As the volume of data to be transferred in a network increases, telecommunications carriers have an increased need for inexpensive high-speed data communication networks. High-cost networks using the time division multiplexing (TDM) method are therefore being replaced with low-cost high-efficiency networks using the Internet Protocol (IP) method.
Some traffic transactions in a network need exact clock synchronization between the sending node side and the receiving node side. For example, exchanging real-time data such as sound and video with high quality needs data reproduction at predetermined timing, and accurate clocks are needed for that purpose.
In another example, mobile network services need exact clock synchronization in order to carry out intercell handover without a hitch. Specifically, base station devices on a mobile network need clock synchronization with accuracy as extremely high as 50 parts per billion (ppb) with wireless network control devices. If the clock synchronization accuracy of a base station device in service exceeds the required value, intercell handover may fail, which can result in missing data and a drop in communication quality.
In a typical TDM-based network, the receiving node can extract clock information on the transmitting node through the transmission channel. It has thus been possible to achieve high-accuracy clock synchronization between the transmitting and receiving nodes. In contrast, an IP-based network transfers data asynchronously. It follows that the pieces of data arrive at the receiving node with fluctuating intervals, and it has been difficult to extract highly accurate clock information from the received data. The receiving node therefore needs to determine the clock interval of the transmitting node in one way or another, and adjust its clock interval to that of the transmitting node. Such an adjustment of the clock interval of the receiving node to that of the transmitting node will be referred to as the receiving node reproducing the clock of the transmitting node.
As a technology for implementing highly accurate clock reproduction through a packet network typified by an IP network or the like, there has been proposed a time stamp method. The time stamp method is described in PTL 1, for example. A block diagram of the time stamp method will be shown in FIG. 1. FIG. 1 shows a situation where a transmitting node or master node 100 transmits packets 120 to a receiving node or slave node 110 through a packet network 130. The section from the master node 100 to the packet network 130 and the section from the packet network 130 to the slave node 110 both are connected by a TDM-based network. In the configuration of FIG. 1, the time stamp method hereinafter is used to perform synchronization control on the TDM flow between the master node lying at the entry edge and the slave node lying at the exit edge through the packet network 130.
According to the time stamp method, the transmitting node or master node 100 transmits packets 120 that contain a time stamp (hereinafter, referred to as “TS”) to the receiving node or slave node 110. Here, TS refers to a value that shows time information generated based on the clock of the master node 100 or the slave node 110. For example, TS is a numerical value that increases by one per minimum time unit of the clock of the master node 100 (for example, 125 usec). The numerical value of the minimum time unit is the clock width. Hereinafter, clocks being in synchronization refers to that the master node and the slave node have the same clock width. It should be appreciated that the foregoing minimum time unit of the clock may be regarded as the speed of the clock. In such a case, being in synchronization refers to that the master node and the slave node have the same clock speed.
In FIG. 1, the packets 120 are a group of packets that are transmitted from the master node 100 at regular intervals. The packets are denoted by 120-1, 120-2, 120-3, 120-4, and 120-5 in order of transmission from the master node. Each of the packets 120 contains TS of the master node at the time of transmission. The packet 120-1 has a TS of 1, the packet 120-2 a TS of 2, the packet 120-3 a TS of 3, the packet 120-4 a TS of 4, and the packet 120-5 a TS of 5.
The packets 120 then arrive at the slave node 110 through the packet network 130 (see the upper part of FIG. 1). The slave node 110 adjusts its clock width according to the intervals of the packets 120 received from the master node 100 so as to synchronize the clock of the slave node 110 with that of the master node 100. Suppose, for example, that the clock of the master node 100 of FIG. 1 increases in TS by one for every 125 usec. In other words, the master node 100 has a clock width of 125 usec. The slave node 110, however, does not necessarily have a clock width of 125 usec, which may be different. In FIG. 1, the packet 120-1 and the packet 120-2 have a TS of 1 and 2, respectively. The interval between the packets is 1 in terms of TS, which is equivalent to 125 usec, the clock width of the master node 100.
Suppose that the transmission of the packets 120 from the master node 100 to the slave node 110 causes no delay. In such a case, the packet 120-1 and the packet 120-2 arrive at the slave node 100 at a TS of 1 and 2 on the clock of the slave node, respectively. Here, the slave node 110 recognizes the difference in TS between the packet 120-1 and the packet 120-2, i.e., 1 as the minimum time unit of the clock of the master node 100, i.e., 125 usec. Consequently, even if the clock width of the slave node 110 is different from that of the master node 100 (in this example, 125 usec), the slave node 110 can adjust its clock width to that of the master node 100 (in this example, 125 usec) for synchronization.
In fact, the packets 120 passed through the packet network 130 entail a delay in the timing of reception at the slave node 110. Suppose that the packets 120-1 and 120-2 arrive at the slave node 110 through the packet network 130 at a TS of 1 and 3 on the clock of the slave node, respectively. This means that the packet 120-2 lags by 1 in terms of TS. In such a case, the slave node 110 recognizes the difference in TS between the packet 120-1 and the packet 120-2, i.e., 2 as the minimum time unit of the clock of the master node 100, whose value is 250 usec. The slave node 110 then adjusts its clock width so that the clock has a minimum time unit of 250 usec. The result is that the clock width of the master node 100 is 125 usec and the clock width of the slave node 110 is 250 usec, i.e., the clock widths do not coincide with each other. Such a situation will be referred to as the master node 100 and the slave node 110 not being in synchronization.
Consequently, the interval at which the packets 120 passed through the packet network 130 arrive at the slave node 110 is different from the interval immediately after the transmission from the master node 100. It is therefore not possible for the slave node 110 to simply use the clock interval calculated from the TS of the received packets 120 as the clock interval of the master node 100 for control. The TS method is a method in which the slave node 110, after receiving the packets 120, adjusts its own clock for synchronization with the clock of the master node 100 by utilizing the TS that is stored as mentioned above. The operation of the clock synchronization according to the TS method will be described in more detail, along with the description of the configuration of the slave node 110.
The slave node 110 includes a packet receiving unit 146 and a phase locked loop (PLL) 140. The packet receiving unit 146 receives a packet 120 transferred from the master node 100 through the packet network 130. The received packet 120 is sent to the PLL 140. The PLL 140 calculates a difference between a TS that is generated from the clock of the slave node 110 when the packet 120 is received from the master node 100 (hereinafter, referred to as “generated TS”) and the TS of the packet 120 received from the master node (hereinafter, referred to as “received TS”).
Based on the difference, the PLL 140 adjusts the own clock for clock synchronization. In an example of configuration, as shown in FIG. 1, the PLL 140 includes a phase comparator 141, a low pass filter (LPF) 142, a proportion-integration (P1) circuit 143, a voltage control oscillator (VCO) 144, and a counter 145.
The phase comparator 141 calculates a difference signal between the received TS and the TS that is generated from the clock of the slave node 110. The difference signal is input to the LPF 142. The LPF 142 attenuates and interrupts signals with frequencies higher than a certain threshold and passes only lower frequencies as a signal, thereby eliminating jitters and noise that occur in the difference signal due to the passage through the packet network 130. The difference signal smoothened by the LPF 142 is input to the PI circuit 143. The PI circuit 143 calculates a control signal that makes the difference signal eventually converge to zero, and outputs the control signal to the VCO 144. The VCO 144 outputs a clock having a frequency that is determined by the control signal from the PI circuit 143. The clock on the slave side is thereby adjusted in width (interval). The counter 145 generates the TS on the slave side based on the adjusted clock, and passes the TS to the phase comparator 141. By such an operation of the PLL 140, the slave node 110 can reproduce the clock of the master node 110 for synchronization with the master node 100 even via the packet network 130.
Since the master node lying at the entry edge and the slave node lying at the exit edge constitute the foregoing configuration through the packet network, it is possible to perform synchronization control on the TDM flow through the packet network.
In a practical network, the data undergoes a queuing delay from routers or switches when being transferred in the packet network. As also discussed in PTL 2, the amount of delay D occurring in a network is typically determined as a difference between the TS that is generated based on the clock of the slave node when a packet arrives at the slave node (generated TS:Ts) and the TS that is stored in the received packet (received TS:Tm). By the time of arrival of a packet that reaches the slave node through a fluctuating network, a delay has therefore occurred in the TS at which the packet actually arrives at the slave node with respect to the received TS. Some packets are given large amounts of delay before arriving at the slave node. The LPF in the slave node performs the processing of smoothening randomness in the amount of delay occurring, thereby reducing the influence of delays. If, however, packets having large amounts of delay arrive due to network congestion or the like and the LPF fails to reduce the influence of the delays sufficiently, a certain type of noise is input to the clock synchronization circuit with a drop in synchronization accuracy. To avoid this, a packet filter function is used to perform filter processing on packets arriving from the master node to the slave node depending on the amounts of delay of the packets. The packet filter function is described, for example, in PTL 3.
FIG. 2 shows an example of distribution of the amounts of delay. In the example, the amounts of delay are distributed from near zero to several hundreds of microseconds. The packet filter function performs the filter processing of setting a threshold for the amount of delay, and employing the TS of packets whose amounts of delay are smaller than the threshold and rejecting the TS of packets whose amounts of delay are greater.
Such selective use discard of the TS of the packets that exceed the threshold in the amount of delay makes it possible to use only the TS of the packets that have small amounts of delay for clock synchronization control with improved synchronization accuracy.
FIG. 3 shows a slave node 310 that includes a packet filter unit. As compared to the slave node 110 in FIG. 1, there is added a packet filter unit 350. The packet filter unit 350 receives a packet arriving from the master node from the packet receiving unit 146, and determines the amount of delay D from the received TS that is stored in the packet (hereinafter, referred to as “Tm”) and the TS that is generated by the slave node itself when the packet arrives (hereinafter, referred to as “Ts”). If the amount of delay D is smaller than a predetermined threshold Dth, the TS of the packet is employed. If the amount of delay D is greater, the TS of the packet is rejected. When employing the TS of the packet, the packet filter unit 350 performs the processing of passing the TS of the packet to the PLL 140.
FIG. 4 shows the timing flow of packets when using the packet filter function. A time axis 401 shows the time axis that indicates the timing in which the master node transmits packets to the slave node. In the example, a packet 405 is transmitted. A clock 402 of the master node (hereinafter, referred to as “master clock 402”) is shown below the time axis 401. The master node transmits the packet 405 at the timing when the TS on the master clock 402 is 55. The packet 405 therefore contains a TS value of 55.
Next, a time axis 403 of the slave node and a clock 404 of the slave node (hereinafter, referred to as “slave clock 404”) are shown below the master clock 402. In the example, the TS of the master clock 402 and the TS of the slave clock 404 at the same point in time are different from each other. For example, the TSs differ such that the master clock 402 has a TS of 70 when the slave clock 404 has a TS of 67. Despite the different TSs for the same point in time, the master clock 402 and the slave clock 404 have the same clock width. A clock in such a state as the slave clock 404 is will hereinafter be referred to as a “slave clock in a synchronous state.” In order for the slave clock to be in a synchronous state, the clock width of the slave clock needs to coincide with that of the master clock. Hereinafter, the operation of a slave clock that is not in synchronization with the master clock according to the TS method will be described with reference to the clock of the slave node that is in a synchronous state (in FIG. 4, written as “slave clock 404”).
Suppose that the network is constructed by the TDM method alone without a packet network. In such a case, the network is not fluctuating and the packet 405 that is transmitted from the master node when the TS on the master clock 402 is 55 arrives at the slave node when the TS on the slave clock 404 is also 55. A packet 406 represents a packet that arrives at the TS (55) when the network is assumed to be delay-free. In fact, the amount of delay D (in the example of FIG. 4, the amount of, delay D=4) is added in the packet network between the master and slave, and the packet arrives at timing 59 of the slave clock 404. A packet 407 represents a packet that is passed through the packet network, is given the amount of delay 4, and arrives when the TS on the slave clock 404 is 59. Hereinafter, the value of the time stamp on the clock of the slave node when a packet transmitted from the master node arrives at the slave node will be referred to as the arrival timing of the packet.
As mentioned above, the amount of delay D is typically determined from the difference between the generated TS and the received TS. More specifically, the expressed is: the amount of delay=the generated TS−the received TS (D=Ts−Tm).
In the example of FIG. 4, D=Ts (=59)−Tm (=55)=4. With a threshold Dth =8, the amount of delay D satisfies 0≦D≦Dth, and the TS of the packet is employed. If a packet arrives with D>Dth, the TS of the packet is rejected.
Since the amount of delay D is thus determined from the difference between the received TS and the generated TS and the filter processing is performed based on the condition that includes the threshold Dth, it is possible to perform clock synchronization control by rejecting the TS of packets that have amounts of delay greater than the threshold Dth and selectively employing only the TS of packets that have smaller amounts of delay.
By the method described above with reference to FIG. 4, it is possible to perform clock synchronization control by using the packet filter function. The description of FIG. 4 has dealt with the case where the master clock 402 and the slave clock 404 are in perfect synchronization with each other and the slave clock 404 is in a synchronous state. In fact, it is not the case that the clocks are in perfect synchronization, and rather the goal is to achieve synchronization from a not synchronized situation by means of synchronization control. When the clock of the master node and that of the slave node are not in synchronization with each other, there is the following problem.
FIG. 5 is a diagram showing the timing flow of FIG. 4 to which timing flow is added of the case where the master clock 402 and a clock 501 of the slave node (hereinafter, referred to as “slave clock 501”) are not in synchronization with each other, and the slave clock 501 has a clock width smaller than that of the master clock 402 in particular.
In FIG. 5, the slave clock 501 for the case where the slave node is not in synchronization with the master node is added to the time axis 401 of the master node, the master clock 402, the time axis 403 of the slave node, and the slave clock 404 in a synchronous state which are shown in FIG. 4. In the example, the slave clock 501 has a clock width smaller than that of the slave clock 404. The slave node is thus not in synchronization with the master node.
FIG. 5 shows an example where the master node transmits a packet 405 that contains the received TS of Tm=55 to the slave node. If the slave clock were in a synchronous state, the slave node would receive the packet 405 at timing when the TS on the slave clock 404 is 55 as shown as the packet 406. There is thus a difference between the timing when the TS on the slave clock 501 not in a synchronous state is 55 (packet 506) and the timing when the TS on the slave clock 404 in a synchronous state is 55 (packet 406). Next, specific description will be given with reference to FIGS. 4 and 5.
As described in FIG. 4, the generated TS on the slave clock 404 in a synchronous state at the arrival timing of the packet 406 that does not include the amount of delay D has a value Ts=55. The generated TS at the arrival timing of the packet 407 that actually includes the amount of delay D (in the example of FIG. 4, D=4) has a value Ts=59.
While the slave clock 404 is in a synchronous state, the TS on the master clock 402 and the TS on the slave clock 404 at the same point in time are different as mentioned previously. For example, the TSs differ such that the master clock 402 has a TS of 70 when the slave clock 404 has a TS of 67.
Similarly, in FIG. 5, at the time when the TS value on the slave clock 404 in a synchronous state at which the packet is received from the master node is 55 (shown as the packet 406), the TS value on the slave clock 501 that is not in a synchronous state is 64.
Without the amount of delay D, the generated TS coincides with the received TS. The generated TS when the slave clock 404 does not include the amount of delay D (packet 406) is thus Ts=55. This shows that the arrival timing of the packet 506 on the slave clock 501, in terms of TS, has a deviation of 55−64=−9 with respect to the arrival timing of the packet 406 on the slave clock 404. That is, the packet 506 whose generated TS on the slave clock 501 is Ts=55 is shifted by −9 from the packet 406 on the slave clock 404. Such a deviation results from the lack of synchronization of the slave clock 501 with the master clock 402. In the present invention, such a difference of the TS on the clock of the slave node from the TS on the clock'of the slave node that is in a synchronous state will be defined as a “time stamp deviation (hereinafter, referred to as “TS deviation”)” and the value will be denoted by Δ . In the foregoing example of FIG. 5, the TS deviation Δ is −9. The inclusion of a TS deviation in the clock of the slave node yields the problem that it is not possible to perform appropriate packet filter processing. Specific description will be given below.
As discussed in FIG. 4, when in a synchronous state, the amount of delay D of the packet 407 is D=Ts−Tm=59−55=4. With a threshold Dth=8, the TS of the packet 407 is employed since 0≦D≦Dth is satisfied.
In contrast, when the master node and the slave node are out of synchronization as in FIG. 5, the generated TS at the arrival timing of the packet 407 arriving at the slave node is Ts=69. It follows that D=Ts−Tm=69−55=14. In the example of FIG. 5 where the threshold Dth is set to be 8, D>Dth holds for the amount of delay D. The amount of delay is determined to be greater than the threshold, and the TS of the packet 407 is rejected. The reason is that the slave clock 501 includes the TS deviation Δ(in this example, Δ=−9) with respect to the slave clock 404, and it is therefore not possible to appropriately determine the amount of delay that the arrival timing of the packet 407 on the slave clock 501 has with respect to the arrival timing of the packet 406 on the slave clock 404. As a result, there occurs the problem that the TS that is supposed to be employed without a delay of the packet arrival is rejected, which results in a failure of appropriate packet filter processing.
That a similar problem can occur when the slave node has a clock width greater than that of the master node will be described with reference to FIG. 6. FIG. 6 is a chart in which the clock of the slave node in FIG. 5, or the slave clock 501, is replaced with a slave clock 601. With the slave clock 601, the slave node is not in synchronization with the master node. The slave clock 601 has a clock width greater than that of the slave clock 404.
On the slave clock 601, where the amount of delay D is included, the generated TS at the arrival timing of the packet 407 is Ts=52. If the packet 406 arrives on the slave clock 404 in a synchronous state where the amount of delay D is assumed not to be included (packet 406, TS=55), the TS on the slave clock 601 not in a synchronous state at the same point in time is 49.
Without the amount of delay D, the generated TS coincides with the received TS. The generated TS on the slave clock 404 therefore is Ts=55. This shows that there is a TS deviation of 55−49=+6 from the arrival timing of the packet 606 on the slave clock 601 to the arrival timing of the packet 406 on the slave clock 404 in terms of TS. That is, the arrival timing of the packet 606 on the slave clock 601 is 55, which is shifted by +6 from the arrival timing of the packet 406 on the slave clock 404. Such a deviation results from the lack of synchronization of the slave clock 601 with the master clock 402. The effect of the deviation on the packet filter will be concretely described below.
As described in FIG. 4, when in a synchronous state, the packet 407 has D=Ts−Tm32 59−55=4. With a threshold Dth=8, the TS of the packet 407 is employed since 0≦D≦Dth is satisfied.
On the other hand, when the master node and the slave node are out of synchronization as in FIG. 6, the generated TS at the arrival timing of the packet 407 is Ts=52. It follows that D=Ts−Tm32 52−55=−3. Since the amount of delay D<0 and does not satisfy 0≦D≦Dth, the TS of the packet 407 is rejected. The reason is that the slave clock 601 includes the TS deviation Δ(in this example, Δ=+6) with respect to the slave clock 404, and it is therefore not possible to appropriately determine the amount of delay that the arrival timing of the packet 407 on the slave clock 601 has with respect to the arrival timing of the packet 406 on the slave clock 404. Consequently, as in the foregoing example of FIG. 5, the TS that is supposed to be employed without a delay of the packet arrival is rejected, which results in a failure of appropriate packet filter processing. As a result, there occurs the problem that it is not possible to synchronize the master clock and the slave clock with each other.